Rambus Inc.

Abhijit Mukund Abhyankar

Frederick Abbott Ware

Craig Edward Hampel

Ely K Tsern

Richard Maurice Barth

Steven Cameron Woo

Billy Wayne Garrett, Jr

Thomas J Sheffler

Catherine Yuhjung Chen

Donald C Stark

Don Stark

A high-speed memory system is disclosed in which a single command effects control over either a single memory device or a plurality of memory devices depending on a present mode of operation. Such control may effect data transfer between the one or more memory devices and a memory controller, as well as operating state transitions or power mode transitions for the memory devices. Similarly, various configurations of relatively low bandwidth memory devices respond as a selectively controllable group to transmit or receive high bandwidth data.

Memory system with channel multiplexing of multiple memory devices

A memory module includes an array of N memory devices, each memory device having M data pins, where N is greater than M, and M and N are positive integers; and N bit lines traversing the array of N memory devices, such that each one of the N bit lines is connected to M of the N memory devices.

Memory module with offset data lines and bit line swizzle configuration

The present invention provides a high data bandwidth memory system capable of operating in non-chip-kill and chip-kill modes. In chip-kill mode, cycle multiplexing, bit multiplexing, and time and space multiplexing are used to read/write data and syndrome across a group of memory devices. Current command packet formats are adapted to communicate with the group of memory devices in chip-kill mode.

High speed memory system capable of selectively operating in non-chip-kill and chip-kill modes

Growing community of inventors

Sunnyvale, CA, United States of America

Abhijit Mukund Abhyankar