National Semiconductor Corporation

Scintera Networks, Inc.

Inphi Corporation

Abhijit M Phanse

Debanjan Mukherjee

Jishnu Bhattacharjee

Abhijit G Shanbhag

Qian Yu

Venugopal Balasubramonian

Wong Hee

Peter J Sallaway

Edem Ibragimov

James B Wieser

Fabian Giroud

Sreen A Raghavan

Michael X Maida

Tulsi Manickam

Prashant Choudhary

Hee Wong

Madabusi Govindarajan

Thulasinath G Manickam

Jishnu Bhatacharjee

A receiver that easily receives signals from transmission channels having long cable lengths is presented. The receiver includes an analog pre-filter that removes distortions and intersymbol interference from a predetermined transmission channel. The analog pre-filter is coupled with a digital receiver that provides digital equalization. The combination of analog equalization with digital equalization allows for simplified digital equalization while retaining the versatility of digital signal processing.

Transceiver system with analog and digital signal echo cancellation having adaptably adjustable filter characteristics

Systems and methods provide analog delay elements, which may be utilized in isolation or in a cascade, such as for use within equalizers or other types of applications. For example, a delay element may include a broadband amplifier and a passive, programmable filter, which may provide a desired magnitude and group delay response over a wide frequency range while being tolerant of process variations. An equalizer, for example, may include the delay element within its feed forward filter and/or within its other circuits, such as within its adaptive coefficient generator or slicer input time-align circuit.

Equalizer systems and methods utilizing analog delay elements

A compensation circuit and method for reducing ISI products within an electrical data signal corresponding to a detected data signal received via a signal transmission medium introduces distinct compensation effects for individual ISI products within the electrical data signal. Distinct data signal components within the detected data signal and corresponding to such ISI products can be selectively and individually compensated, thereby producing a compensated data signal in which each selected one of such individual data signal components is substantially removed. Individual data signal components or selected combinations of data signal components can be compensated as desired.

Compensation circuit and method for reducing intersymbol interference products caused by signal transmission via dispersive media

An analog equalizer (and) adaptively equalizes an input analog signal affected with intersymbol interference ('ISI'), or an intermediate analog signal generated therefrom, to produce a filtered partially equalized analog signal with reduced ISI. An analog-to-digital converter () converts the filtered analog signal, or an intermediate analog signal generated therefrom, into an initial digital signal. A digital equalizer () adaptively equalizes the initial digital signal, or an intermediate digital signal generated therefrom, to produce an equalized digital signal as a stream of equalized digital values with further reduced ISI. An output decoder () decodes the equalized digital values, or intermediate digital values generated therefrom, into a stream of symbols. Equalization control circuitry (and) adjusts equalization filter characteristics of the equalizers such that adjustments of the filter characteristics of one of the equalizers depend adaptively on adaptive adjustments of the filter characteristics of the other equalizer.

Receiver system with interdependent adaptive analog and digital signal equalization

Analog echo-cancelling circuitry (and) operates on an input analog signal that includes an echo of an output signal, or on an analog signal generated from the input signal, to produce an analog signal with reduced echo. An analog-to-digital converter () converts the echo-reduced analog signal, or an analog signal generated therefrom, into a digital signal. Digital echo-cancelling circuitry (and) operates on the digital signal, or on a digital signal generated therefrom, to produce a digital signal with further reduced echo. An output decoder () decodes the echo-reduced digital signal, or a digital signal generated therefrom, into a stream of symbols. The echo-filtering characteristics of both echo-cancelling circuitries are typically adaptively adjusted during generation of the symbol stream. The analog echo-filtering characteristics may be adapted in response to information provided by operating on the echo-reduced digital signal or on a digital signal generated therefrom.

A receiver system contains an analog pre-filter (207 or 619), an analog-to-digital converter (210), a digital equalizer (212), and a decoder (605) arranged sequentially for processing an input analog signal (y). The pre-filter produces a filtered analog signal (Z) with reduced intersymbol interference. The converter provides analog-to-digital signal conversion. Digital equalization circuitry in the equalizer operates according to a transfer frmnction to produce an equalized digital signal (a') as a stream of equalized digital values. Coefficients cand care fixed. Each other coefficient cis adaptively chosen. The decoder converts the equalized digital values, or intermediate values generated therefrom, into a stream of symbols. A receiver system may include two or more receivers each configured in the foregoing way with the digital equalization circuitry in each receiver operating according to a transfer function where at least coefficients c, c, and care non-zero.

Receiver system having analog pre-filter and digital equalizer

An analog equalizer (and) adaptively equalizes an input analog signal affected with intersymbol interference ('ISI'), or an intermediate analog signal generated therefrom, to produce a filtered partially equalized analog signal with reduced ISI. An analog-to-digital converter () converts the filtered analog signal, or an intermediate analog signal generated therefrom, into an initial digital signal. A digital equalizer () adaptively equalizes the initial digital signal, or an intermediate digital signal generated therefrom, to produce an equalized digital signal as a stream of equalized digital values with further reduced ISI. An output decoder () decodes the equalized digital values, or intermediate digital values generated therefrom, into a stream of symbols. Equalization control circuitry (and) adjusts equalization filter characteristics of the equalizers such that adjustments of the filter characteristics of the analog equalizer depend adaptively on adaptive adjustments of the filter characteristics of the digital equalizer.

An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

Adaptive signal latency control for communications systems signals

Systems and methods are disclosed to provide channel monitoring and/or performance monitoring for a communication channel. For example, in accordance with an embodiment of the present invention, an equalizer is disclosed that equalizes for channel distortions and also provides channel and performance monitoring information, such as for example bandwidth estimation, channel identification, signal-to-noise ratio, chromatic dispersion, and/or polarization-mode dispersion.

Channel monitoring and identification and performance monitoring in a flexible high speed signal processor engine

There is disclosed an echo canceller circuit for use in a full duplex transceiver of the type comprising a line driver capable of sending analog transmit signals through a cable and comprising a line receiver capable of receiving analog receive signals from the cable. An echo canceller impedance model circuit is coupled to an output of the line driver and is coupled to an input of the line receiver. The echo canceller impedance model circuit generates an echo canceller current that is equal in magnitude and opposite in phase to a current that represents signal echoes that are present in the analog receive signals. The echo canceller impedance model circuit has a variable impedance for generating the echo canceller current. The variable impedance has at least one variable resistor and at least one variable capacitor. The values of resistance and capacitance in the echo canceller impedance model circuit are varied in response to control signals from a echo canceller control circuit to compensate for and cancel signal echoes.

System and method for cancelling signal echoes in a full-duplex transceiver front end

Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.

Method and apparatus for generating coefficients in continuous time equalizers

An adaptive signal equalizer with a feedforward filter in which the feedback error signal and corresponding incoming data signal are dynamically aligned in time using signal interpolation, and further, to control the precursor/postcursor filter taps configuration, thereby producing more adaptive filter tap coefficient signals for significantly improved and robust signal equalization.

Adaptive signal equalizer with adaptive error timing and precursor/postcursor configuration control

A continuous time electronic dispersion compensation architecture using feed forward equalization and a non-linear decision feedback equalization forms an output signal by a linear combination of successively delayed versions of the input signal and the sliced output signal weighted by appropriate coefficients. A selected number of taps in the mixer used to generate a corresponding number of coefficients for use in the feed forward equalizer are held to a selected voltage to ensure that the coefficients associated with these two taps do not drift. This causes the other coefficients to converge to a unique minimum square error value. In one embodiment the selected voltage is the maximum system voltage.

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Cupertino, CA, United States of America

Abhijit M Phanse