Nxp B.v.

Abhijit Kumar Deb

Hubertus Gerardus Hendrikus Vermeulen

Sujan Pandey

Alexander Kordes

Donald Robert Pannell

Lucas Pieter Lodewijk Van Dijk

Claude Robert Gauthier

A priority queue sorting system including a priority queue and a message storage. The priority queue includes multiple priority blocks that are cascaded in order from a lowest priority block to a highest priority block. Each priority block includes a register block storing an address and an identifier, compare circuitry that compares a new identifier with the stored identifier for determining relative priority, and select circuitry that determines whether to keep or shift and replace the stored address and identifier within the priority queue based on the relative priority. The message storage stores message payloads, each pointed to by a corresponding stored address of a corresponding priority block. Each priority block contains its own compare and select circuitry and determines a keep, shift, or store operation. Thus, sorting is independent of the length of the priority queue thereby achieving deterministic sorting latency that is independent of the queue length.

Priority queue sorting system and method with deterministic and bounded latency

Embodiments of a device and method are disclosed. In an embodiment, a network interface device is disclosed. The device includes a network interface configured to provide an interface to a network, a functional component interface configured to provide an interface to a functional component, and distributed test logic located in a path between the network interface and the functional component interface and configured to manage test information related to testing of the functional component and to communicate test information between the network interface and the distributed test logic and between the functional component interface and the distributed test logic.

Network interface device and method for operating a network interface device

A central network component, a FlexRay-compatible central network component, and a method for bit processing in a central network component are described. In one embodiment, a central network component for facilitating communication among communication nodes includes a bit oversampling module configured to oversample bits received from a first communication node of the communication nodes with an oversampling factor to generate oversampled bit streams, a time point selection module configured to select time points in the oversampled bit streams, where the time points correspond to inner samples of the oversampled bit streams with respect to the oversampling factor, and a bit outputting module configured to output the inner samples to a second communication node of the communication nodes between the time points. Other embodiments are also described.

System and method for bit processing in a central network component

A FlexRay network guardian including: a resetting leading coldstart node (RLCN) detector configured to detect a RLCN failure; a deaf coldstart node (DCN) detector configured to detect a DCN failure; a babbling idiot (BI) detector configured to detect a BI failure; and a FlexRay network decoder configured to output a signal regarding the status of the FlexRay network to the RLCN detector, DCN detector, and BI detector, wherein the RLCN detector, DCN detector, and BI detector are configured to send an indication of a failure to a containment module.

FlexRay network runtime error detection and containment

A device and method for encoding bits to symbols for a communication system are described. In one embodiment, a method for encoding bits to symbols for a communication system includes receiving a set of N-bit data to be transmitted, where N is an integer, generating side scrambling values using a polynomial, scrambling the set of N-bit data using the side scrambling values to produce scrambled data, mapping the scrambled data to a particular set of M symbols from a plurality of sets of M symbols, where M is an integer and M is smaller than N, and outputting the particular set of M symbols for transmission over a transmission medium. Other embodiments are also described.

Device and method for encoding bits to symbols for a communication system

Devices and methods for providing filtering for an analog-to-digital converter (ADC) are described. In one embodiment, a method for providing filtering for an ADC involves obtaining a filter coefficient of a post-filtering filter that is located after the ADC on a signal path and generating a filter coefficient of a pre-filtering filter that is located before the ADC on the signal path based on the filter coefficient of the post-filtering filter. Other embodiments are also described.

Device and method for providing filtering for an analog-to-digital converter (ADC)

Data communications are effected over one or more network branches to ensure appropriate receipt of data at different devices on the network. In accordance with an example embodiment, time-based communications are effected for a plurality of different network devices, at least two of which are connected to a common wired network link, with each network device being assigned to communicate during different time slots within a communication cycle. Each communication received on the common wired network link is assessed as being error-indicative or not error-indicative. In response to a received communication on the common wired network link being assessed as being error-indicative, the common wired network link is operated to corrupt data received on the branch, such as by driving the branch during a time slot in which the error-indicative communication is received, therein ensuring that other network devices disregard the data received during that time slot.

Communications apparatus, system and method with error mitigation

As consistent with one or more embodiments, electronic circuitry is characterized to provide an indication of susceptibility of the circuitry to error. As consistent with one or more embodiments, bits corresponding to a circuit component of a circuit design are evaluated using a software program that characterizes a hardware description language representing the circuit components and their interconnectivity. A noise power value is calculated for each bit, and bits are identified as being susceptible to data error based upon the noise power value and a signal-to-noise (SNR) ratio reference value. A characterization of the circuit components (e.g., a quality factor) is provided based upon a number of bits susceptible to data errors.

Data error susceptible bit identification

Systems and methods for encoding a slot table for a communications controller of a communications network are described. In one embodiment, a method for encoding a slot table for a communications controller of a communications network includes classifying branches of the communications network that are connected to the communications controller into at least one group, where each of the at least one group includes multiple branches, and generating a slot table entry for a time slot for accessing the communications network through the communications controller based on the at least one group. Other embodiments are also described.

System and method for encoding a slot table for a communications controller

Central bus guardians (CBGs) and methods for operating a CBG are described. In one embodiment, a method for operating a CBG includes performing race arbitration among the buses connected to the CBG to select a winner bus for a time slot, and selectively forwarding data received at the CBG from the winner bus to a destination bus in the time slot based on whether the winner bus or the destination bus has a connection to an external network with respect to the application network and whether a communications device connected to the winner bus or the destination bus performs a critical function. Other embodiments are also described.

Central bus guardian (CBG) and method for operating CBG

Systems and methods for testing a communications network having a central bus guardian (CBG) to detect a faulty condition associated with the CBG are described. In one embodiment, a method for testing a communications network having a CBG to detect a faulty condition associated with the CBG includes supplying a communications schedule to the CBG, causing test data to be transmitted between different buses that are connected to the CBG according to the communications schedule, and determining the faulty condition associated with the CBG based on whether or not the test data is received according to the communications schedule. Other embodiments are also described.

System and method for testing a communications network having a central bus guardian (CBG) to detect a faulty condition associated with the CBG

Data communications are effected in a network having a plurality of different network devices, at least two of the network devices connected to a common wired network link and in which each network device is assigned to communicate during different time slots within a communication cycle. Stored communication protocol data is used to evaluate received configuration data specifying a communication schedule. An output indicative of a non-compliant communication is generated if the evaluation indicates that the communication schedule fails to comply with the protocol data. If the communication schedule complies with the stored communication protocol data, the communication schedule is stored and used to communicate data between the network devices, via a central communication circuit according to time slots specified in the evaluated communication schedule.

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Eindhoven, Netherlands

Abhijit Kumar Deb