Mitsubishi Electric Information Technology Center America, Inc.

Mitsubishi Electric Research Laboratories, Inc.

Abhijit Ghosh

Chia Shen

Hugh C Lauer

Randy B Osborne

John H Howard

Mikhail Bershteyn

Qin Zheng

Chiahon Chien

Ross T Casley

Osamu Yamamoto

Donald Tarrodaychik

Michael Leigh Lipsie

Anurag Jain

Harufusa Kondoh

A switch for digital communication networks includes a queuing system cape of implementing a broad class of scheduling algorithms for many different applications and purposes, with the queuing system including both a tag-based primary queue which contain ATM cells organized by priority and a secondary queue which contains ATM cells which are not yet scheduled for transmission and which are organized by virtual channel. A queuing decision module is provided to determine in which queue an incoming ATM cell should be deposited. A requeuing module operates when an event occurs that unblocks a particular virtual channel. The requeuing module, on occurrence of such an event, accesses the secondary queue to obtain another cell, to assign it priority and to move it to the primary queue. The queuing decision module, along with a virtual channel table, can be used easily to block virtual channels when necessary. The combination of queues also allows for round robin scheduling.

ATM local area network switch with dual queues

The speed of a hardware-software debugger is markedly increased through the use of high speed simulators which ignore all systems operations except those where design errors are expected to manifest themselves, by skipping CPU bus cycles of no interest for the simulation, by not explicitly simulating periodic clock signals and generating only schedules of clock signals, and by caching instructions when alien computers are used in the simulation process to eliminate decoding of the instructions of the target computer.

Hardware-software debugger using simulation speed enhancing techniques

A switch for digital communication networks includes a queuing system capable of implementing a broad class of scheduling algorithms for many different applications and purposes, with the queueing system including means for providing numerical tags to incoming cells or packets, the values of the tags being calculated when incoming cells or packets arrive at the switch. A queue and search module is provided to select cells or packets for transmission based on these tags. The combination of the tags and the queue and search module enables simple and fast implementations of a wide variety of scheduling algorithms, including algorithms for supporting communication traffic with real time requirements, continuous media such as audio and video, and traffic requiring very fast response. Furthermore, multiple classes of traffic are supported in a single network switch, each class having its own scheduling algorithm and policy. The queue and search module is designed for VLSI implementation, and in one embodiment supports an ATM switch with 16 ports, each port operating at 622 megabits per second.

Tag-based scheduling system for digital communication switch

Growing community of inventors

Berkeley, CA, United States of America

Abhijit Ghosh