Rfmicron, Inc.

Other

Javelin Semiconductor, Inc.

Avago Technologies General IP (singapore) Pte. Ltd.

Cufer Asset Ltd. L.l.c.

Abhay Misra

John A Trezza

Shahriar Rokhsaz

Marwan M Hassoun

Brian David Young

John James Paulos

Ahmed Younis

Benjamin Cooke

Timothy Joseph Dupuis

A method begins by a first radio frequency identification (RFID) sensor, that is associated with a first object element, receiving a first data request signal from an RFID reader and sending a first radio frequency (RF) signal that includes first data to the RFID reader in response to the first data request signal. The method continues with a second RFID sensor receiving a second data request signal from, and sending second data to, the RFID reader. The method continues with the RFID reader sending a representation of the first and second data to a data processing unit, which processes the representation of the first and second data to determine a first and second data point regarding first and second object elements. The method continues by the data processing unit processing the first and second data points to determine an environmental relationship between the first and second object elements.

Radio frequency identification (RFID) tag(s) and sensor(s)

A wireless sensor includes an antenna, a sensing element, a tuning circuit, a processing module, a reference circuit block, and a transmitter. The tuning circuit adjusts the RF front-end to compensation for a change in a characteristic of the RF front end caused by the sensing element. The reference circuit block generates a signal based on a low voltage low frequency input that corresponds to a second environmental condition. The processing module generates a first digital value based on the adjustment to the RF front-end, where the first digital value is a representation of the first environmental condition, and generate a second digital value based on the signal, where the second digital value is a representation of the second environmental condition. The transmitter generates the outbound RF signal that includes at least one of the first and second digital values.

A passive radio frequency identification (RFID) sensor is provided. This passive RFID sensor includes at least one antenna, at least one processing module, and a wireless communication module. The at least one antenna has an impedance that may vary with an environment in which the sensor is placed. Additionally, the antenna impedance might be permanently changed in response to an environmental variation or an event. The at least one processing module couples to the antenna and has a tuning module that may vary a reactive component impedance coupled to the antenna in order to change a system impedance. The system impedance includes both the antenna impedance and the reactive component impedance. The tuning module then produces an impedance value representative of the reactive component impedance. A memory module may store the impedance value which may then later be communicated to an RFID reader via the wireless communication module. The RFID reader may then exchange the impedance value representative of the reactive components of impedance with the RFID reader such that the RFID reader or another external processing unit may process the impedance value in order to determine environmental conditions at the inductive loop. These environmental conditions may include but are not limited to temperature, humidity, wetness, or proximity of the RFID reader to the passive RFID sensor.

Stacked CMOS power amplifier (PA) and radio frequency (RF) coupler devices and related methods are disclosed. The stacked device includes a CMOS PA die configured to receive a transmit input signal and to output an amplified transmit signal, and a RF coupler device configured to receive the amplified transmit signal, to output an antenna transmit signal, and to output an RF signal proportional to the antenna transmit signal. The CMOS PA die and the RF coupler device are stacked on top of and electrically coupled to each other, and the CMOS PA die and the RF coupler device are combined within a single semiconductor package. In some embodiments, the RF coupler device is positioned on top of the CMOS PA die, and in other embodiments the CMOS PA die is positioned on top of the RF coupler device.

Stacked CMOS power amplifier and RF coupler devices and related methods

A method of creating an improved sensitivity capacitive fingerprint sensor involves forming vias from a first side of a sensor chip having an array of capacitive sensors, making the vias electrically conductive, and attaching a cover plate over the first side of the sensor chip spaced from the sensor chip by a distance of less than 25 &#x3bc;m. An improved sensitivity capacitive fingerprint sensor has a capacitive sensor array including multiple sensor cells and electrically conductive, through-chip vias extending from connection points for sensor cell circuitry to a back side of the capacitive sensor array, a chip including active detection circuitry and electrical connection points, the electrical connection points being respectively connected to corresponding ones of the sensor cell circuitry connection points, and a cover plate, disposed above the sensor cells at a spacing of less than 25 &#x3bc;m.

Method of making a capacitive sensor

CMOS power amplifiers (PAs) are disclosed having one or more integrated one-time programming (OTP) memories that are utilized to control at least in part operation of the CMOS PAs. The integrated OTP memories within the CMOS power amplifiers (PAs) allow adjustments, such as one-time factory trimming, of CMOS PA integrated circuits to optimize or improve performance. With this capability, for example, the tuning and biasing of stages within a multi-stage amplifier within a CMOS PA can be measured during factory test and adjusted by setting one or more bits in the OTP memories, as desired. Further, the operation of other circuitry within the PA can also be controlled at least in part with parameter settings stored in the OTP memories.

CMOS power amplifiers having integrated one-time programmable (OTP) memories

A method of creating a unified chip involves performing front-end processing on a first wafer, the front end processing creating multiple devices on the wafer, performing back-end processing on a second wafer, the back end processing creating layers of interconnected metal traces arranged to interconnect at least some of the multiple devices to each other, and bonding the first wafer to the second wafer such that the multiple devices on the first wafer are interconnected to each other by the metal traces of the second wafer.

Growing community of inventors

Austin, TX, United States of America

Abhay Misra