Stmicroelectronics Maroc

Abdelouahid Zakriti

The invention concerns receive circuitry for extracting horizontal and vertical synchronization signals from a digital synchronization signal associated with a video signal, the digital synchronization signal having a plurality of pulses, the receive circuitry including detection circuitry arranged to determine a first value indicative of the time delay between a timing edge of a first pulse and a timing edge of a second pulse of the digital synchronization signal; and a synchronization extraction block arranged to determine that one of the plurality of pulses is a vertical synchronization pulse based on a comparison between the first value and a reference value.

Video signal synchronization

An address configuration circuit and a method for sharing a series bus connected to a first device between two secondary devices by a configuration within each secondary device of a different address, including, in a configuration phase, the temporary configuring of an output terminal of each secondary device in a mode of reading of the voltage present on this terminal to select one address out of two within the device.

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Rabat, Morocco

Abdelouahid Zakriti