Intel Corporation

Aastha Uppal

Je-Young Chang

Edvin Cetegen

Weihua Tang

Omkar G Karhade

Sanka Ganesan

Mitul Bharat Modi

Debendra Mallik

Ravindranath Vithal Mahajan

Nitin A Deshpande

Ram S Viswanath

Yiqun Bai

Kumar Abhishek Singh

Jan Krajniak

Shawna M Liff

Saikumar Jayaraman

Pooya Tadayon

James Chris Matayabas, Jr

Chandra Mohan Jha

Xavier Francois Brun

Jimin Yao

Paul J Diglio

Shankar Devasenathipathy

Manish Dubey

Kelly P Lofgreen

Joseph B Petrini

George Vakanas

Aaron McCann

Tannaz Harirchian

Divya Mani

Pilin Liu

Sri Chaitra Chavali

Sandeep Gaan

Minseok Ha

Shereen Elhalawaty

Javed Shaikh

An integrated circuit assembly may be formed comprising an electronic substrate, at least one integrated circuit device electrically attached to the electronic substrate, a heat dissipation device comprising a main body portion and a resilient portion extending from the main body portion, wherein the resilient portion has a plurality of extensions, a thermal interface material between the at least one integrated circuit device and the heat dissipation device, and a stiffener attached to the electronic substrate, wherein at least a portion of the plurality of extensions of the resilient portion of the heat dissipation device are biased against the stiffener.

Heat dissipation device having shielding/containment extensions

Embodiments disclosed herein comprise a die and methods of forming a die. In an embodiment, a die comprises, a die substrate, wherein the die substrate has a first thermal conductivity, and a first layer over the die substrate, wherein the first layer has a second thermal conductivity that is greater than the first thermal conductivity. In an embodiment, the die further comprises a second layer over the first layer, wherein the second layer comprises transistors.

Thermally enhanced silicon back end layers for improved thermal performance

Embodiments include semiconductor packages. A semiconductor package include a high-power electronic component and an embedded heat spreader (EHS) in a package substrate. The EHS is adjacent to the high-power electronic component. The semiconductor package includes a plurality of thermal interconnects below the EHS and the package substrate, and a plurality of dies on the package substrate. The thermal interconnects is coupled to the EHS. The EHS is below the high-power electronic component and embedded within the package substrate. The high-power electronic component has a bottom surface substantially proximate to a top surface of the EHS. The EHS is a copper heat sink, and the high-power electronic component is an air core inductor or a voltage regulator. The thermal interconnects are comprised of thermal ball grid array balls or thermal adhesive materials. The thermal interconnects couple a bottom surface of the package substrate to a top surface of a substrate.

Embedded substrate heat sink for bottom side cooling

Embodiments disclosed herein include an electronics package and methods of forming such electronics packages. In an embodiment, the electronics package comprises a package substrate, and a first die coupled to the package substrate. In an embodiment, a cavity is formed through the package substrate. In an embodiment, the cavity is within a footprint of the first die. In an embodiment, the electronics package further comprises a thermal stack in the cavity. In an embodiment, the thermal stack contacts the first die.

Thermally-optimized tunable stack in cavity package-on-package

Package assemblies with a molded substrate comprising fluid conduits. The fluid conduits may be operable for conveying a fluid (e.g., liquid and/or vapor) through some portion of the package substrate structure. Fluid conduits may be at least partially defined by an interconnect trace comprising a metal. The fluid conveyance may improve thermal management of the package assembly, for example removing heat dissipated by one or more integrated circuits (ICs) of the package assembly.

Active package cooling structures using molded substrate packaging technology

An integrated circuit assembly may be formed comprising an electronic substrate, at least one integrated circuit device electrically attached to the electronic substrate, a heat dissipation device, a thermal interface material between the at least one integrated circuit device and the heat dissipation device, and a metal foam surrounding the at least one integrated circuit device and contacting the thermal interface material. The integrated circuit assembly may further include a stiffener attached to the electronic substrate and surrounding the at least one integrated circuit device, wherein the metal foam is disposed between the stiffener, the at least one integrated circuit device, the electronic substrate, and the heat dissipation device.

Integrated circuit assemblies having metal foam structures

An Integrated Circuit (IC) assembly, comprising an IC package coupled to a substrate, and a subassembly comprising a thermal interface layer. The thermal interface layer comprises a phase change material (PCM) over the IC package. At least one thermoelectric cooling (TEC) apparatus is thermally coupled to the thermal interface layer.

Thermoelectric coolers combined with phase-change material in integrated circuit packages

An integrated circuit assembly may be formed using a phase change material as an electromagnetic shield and as a heat dissipation mechanism for the integrated circuit assembly. In one embodiment, the integrated circuit assembly may comprise an integrated circuit package including a first substrate having a first surface and an opposing second surface, and at least one integrated circuit device having a first surface and an opposing second surface, wherein the at least one integrated circuit device is electrically attached by the first surface thereof to the first surface of the first substrate; and a phase change material formed on the integrated circuit package.

Phase change materials for electromagnetic interference shielding and heat dissipation in integrated circuit assemblies

An apparatus is provided which comprises: a package substrate, an integrated circuit device coupled to a surface of the package substrate, a first material on the surface of the package substrate, the first material contacting one or more lateral sides of the integrated circuit device, the first material extending at least to a surface of the integrated circuit device opposite the package substrate, two or more separate fins over a surface of the integrated circuit device, the two or more fins comprising a second material having a different composition than the first material, and a third material having a different composition than the second material, the third material over the surface of the integrated circuit device and between the two or more fins. Other embodiments are also disclosed and claimed.

Coupled cooling fins in ultra-small systems

An integrated circuit package may be formed having at least one heat dissipation structure within the integrated circuit package itself. In one embodiment, the integrated circuit package may include a substrate; at least one integrated circuit device, wherein the at least one integrated circuit device is electrically attached to the substrate; a mold material on the substrate and adjacent to the at least one integrated circuit device; and at least one heat dissipation structure contacting the at least one integrated circuit, wherein the at least one heat dissipation structure is embedded either within the mold material or between the mold material and the substrate.

Thermal management solutions for integrated circuit packages

Embodiments include an electronics package and methods of forming such packages. In an embodiment, the electronics package comprises a first package substrate. In an embodiment, the first package substrate comprises, a die embedded in a mold layer, a thermal interface pad over a surface of the die, and a plurality of solder balls over the thermal interface pad. In an embodiment, the thermal interface pad and the solder balls are electrically isolated from circuitry of the electronics package. In an embodiment, the electronics package further comprises a second package substrate over the first package substrate.

Interposer package-on-package (PoP) with solder array thermal contacts

Embodiments of the present disclosure provide techniques and configurations for inspection of a package assembly with a thermal solution, in accordance with some embodiments. In embodiments, an apparatus for inspection of a package assembly with a thermal solution may include a first fixture to house the package assembly on the apparatus, and a second fixture to house at least a portion of a thermal solution that is to be disposed on top of the package assembly. The apparatus may further include a load actuator, to apply a load to a die of the package assembly, via the thermal solution, and a plurality of sensors disposed around the thermal solution and the package assembly, to perform in situ thermal and/or mechanical measurements associated with the application of the load to the die of the package assembly. Other embodiments may be described and/or claimed.

Apparatus for inspection of a package assembly with a thermal solution

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Chandler, AZ, United States of America

Aastha Uppal