Thomson Licensing

Thomson Licensing S.a.

Interdigital Ce Patent Holdings

Liu, Weixiao

Mayer, Matthew Thomas

Bouillet, Aaron Reel

Aaron Reel Bouillet

Matthew Thomas Mayer

John Sidney Stewart

Weixiao Liu

Mark Francis Rumreich

Maxim Borisovich Belotserkovsky

Ivonete Markman

Scott Matthew Lopresto

David Glen White

Joseph Lee Carpenter

Gerald Colman

Maxim Berlotserkovsky

Dong Chang Shiue

An antenna structure is described that includes a flexible substrate and at least two antenna elements being formed from conductive traces on a layer of the flexible substrate. The antenna structure also includes a plurality of conductive traces formed on the layer of the flexible substrate with a first subset being electrically coupled as a lead in to a first one of the antenna elements and a second subset of the plurality of conductive traces being electrically coupled as a lead in to a second one of the antenna elements, wherein the first subset and the second subset are separately coupled electrically to one connector after insertion of an edge of the flexible substrate into the connector. An apparatus is described that includes a case, an electronic assembly, including a printed circuit board and a support bracket, contained within the case. The apparatus further includes the antenna assembly as described herein.

Apparatus with integrated antenna assembly

A method for controlling data throughput of a public user at a subscriber access point, including determining if the public user has established a connection at the subscriber access point, measuring the physical layer data rate of the public user retrieving a maximum channel usage time limit and limiting an amount of data transferred on a per unit of time basis responsive to the measured physical data rate and the maximum channel usage time limit.

Multiuser WiFi bandwidth allocation method and apparatus

A digital data stream comprises alternating groups of information blocks and groups of parity blocks, each group of information blocks includes multiple information blocks and each group of parity blocks includes multiple parity blocks. An apparatus for receiving a digital data stream comprises a demodulator that receives and demodulates a digital data stream. An equalizer compensates for distortions in the digital data stream. A delay buffer generates a first stream of digital data representing the compensated digital data stream and a second stream of digital data representing a delayed version of the compensated digital data stream. A forward error correction block receives and processes the first and second streams of digital data from the delay buffer, and outputs an error corrected stream of digital data. A transport block receives and processes the error corrected stream from the forward error correction block for display.

Reliable diversity architecture for a mobile DTV system

A method and apparatus for allowing a configuration of the operation of one or more antennas in a device, such as a gateway device or other network device, is provided. The method and apparatus operate in a manner such that the configuration allows a static configuration of a specific antenna in a multiple antenna device or system. In some cases the accompanying transmission and reception circuit are configured to operate or transact specifically with another device (e.g., network client device).

Apparatus and method for setting the operation of an antenna

The determination and identification of channels in a signal is an important aspect of the operation of a signal receiver. A method () is described including the steps receiving () a signal containing a plurality of channels, filtering () the signal to produce an indicator of a channel band edge, and determining () a characteristic of the channel based on the indicator. Additionally, an apparatus () is described including a spectrum shift circuit () that receives an input signal and shifts the frequency spectrum of the signal, a filter () that filters the frequency shifted signal to produce an indicator of a band edge of a channel, and a signal analysis circuit () that determines a characteristic of the channel based on the indicator of the band edge, the signal analysis circuit () controlling the frequency shift in the spectrum shift circuit () based on the determined characteristic of the channel.

Method and apparatus for determining channels in a signal

A receiver is an ATSC (Advanced Television Systems Committee)-receiver and comprises a controller and an equalizer, which comprises a feed-forward filter and a feed-back filter. The feed-forward filter comprising at least one tap associated with at least one tap coefficient value. The controller determines a location of at least one tap of the equalizer; and if that location is close to a tap boundary (or edge) of the equalizer, the at least one tap of the equalizer is shifted forward or backward by at least one sample position.

Equalizer based symbol timing recovery with symbol enabled control

A receiver (a) translates a frequency spectrum of a received wideband signal such that a narrowband region of the wideband signal is applied to a filter for use in removing narrowband interference; and (b) tracks the narrowband interference by adjusting the frequency translation as a function of signal levels in narrowband regions adjacent to the narrowband interference region.

Co-channel interference remover

The determination of the signal modulation format for a channel is an important aspect of the operation of a signal receiver. A method () is described including the steps of receiving () a signal, comparing () a sample of the received signal to a first threshold value and a second threshold value, creating () a signal profile based on the comparison, and selecting () a modulation format for the received signal based on the signal profile. An apparatus () is also described including a ring counter () that receives a sample of an input signal, compares the sample to a first threshold value and a second threshold value, and creates a signal profile for the input signal, a signal profiler () that compares the signal profile for the input signal to at least two reference profiles, and a detector () that determines a modulation format for the input signal based on the comparison in the signal profiler ().

Apparatus and method for determination of signal format

A receiver processes a received signal for determining the presence of a co-channel interfering signal by (a) measuring a power level of a first signal in a first narrowband frequency region of a wideband frequency channel; (b) measuring power levels of signals in narrowband frequency regions adjacent to the first narrowband frequency region; and (c) determining if the first signal is an interfering signal in the wideband frequency channel as a function of the measured power levels.

Co-channel interference detector

A software packet error system for a High Definition Television (HDTV) receiver. A data packet error signal is transferred from a forward error correcting Reed-Solomon decoder to a transport processor. In response to a segment sync signal, the transport processor generates an error signal which appears on a programmable output pin. The software packet error signal is synchronized with the outgoing data packet signal such that each data packet is bracketed or framed by its associating packet error signal. Precession of the start of the data packets forwarded on the transport but relative to the start of the data packets appearing at the output of the decoder occurs as a result of a training packet generated for every 312 data packets. The precession is reset at the beginning of every field and is predictable across the field duration with sufficient accuracy to make the software packet error mechanism feasible.

Packet error signal generator

The present application generally relates to apparatuses such as television signal processing apparatus that process radio frequency signals. More specifically, the present application is particularly useful in integrated circuits that must receive a radio frequency signal and simultaneously use circuitry where the timing of the operations are based on the received RF signal and circuitry where the timing is based on a fixed rate signal with sensitivity to clock jitter. According to an exemplary embodiment, the apparatus comprises, a first input (RefClk), a second input (PllClk), an output (CLK 1X), a delay means (), and a logic means (, and) to compare a plurality of stages of said delay means to produce an signal at said output.

Analog to digital converter clock synchronizer

The present application generally relates to apparatuses such as television signal processing apparatus that process radio frequency signals. More specifically, the present application is particularly useful in integrated circuits that must combine circuitry operating in a synchronous-sampling mode that must be adapted for use with a fixed rate sampling mode application. According to an exemplary embodiment, the television signal processing apparatus comprises a source of a fixed rate digital signal, signal processing circuitry operating in a synchronous-sampling mode wherein the signal processing circuitry comprises a signal representing a symbol rate, and an interpolator for processing the fixed rate digital signal to yield samples at the symbol rate.

Method for using a synchronous sampling design in a fixed-rate sampling mode

A system is described for establishing timing synchronism between a local receiver symbol clock and a transmitter symbol clock. A prescribed number of offset values are calculated for desired symbol timing range, the offset values being grouped substantially symmetrically about a central offset value. Each of the preselected offset values are tested to see if symbol timing recovery lock can be achieved by starting at the central offset value and gradually moving away from such value. Finally, two timing detection algorithms are used and switched between the two algorithms is carried out as desired to maximize the possibility of STR lock.

Symbol timing search algorithm

A system for receiving a composite signal including a main component and a multipath component includes a demodulator chain having adaptive circuitry controllable in response to a control signal to compensate for the multipath component. In this system, a control signal generator includes a phase error estimator, which generates a signal representing an estimate of the phase error between the received main component and the received multipath component. A controller generates the control signal in responsive to the phase error signal.

System for detecting the characteristics of a time varying multipath component

Channel acquisition in a digital television signal receiver is improved by determining the carrier tracking loop frequency offsets and the symbol timing recovery offsets for each channel in the television receiver. Offsets are stored in respective EEPROMs for each channel. When a channel is to be acquired in the TV receiver the tune command will be applied to the appropriate EEPROMs and the respective values are conveyed to the VSB demodulator to start acquisition of the channel.

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Noblesville, IN, United States of America

Aaron Reel Bouillet