Novellus Systems Incorporated

Lam Research Corporation

Aaron R Fellis

Michal Danek

Raashina Humayun

Juwen Gao

Sean C Chang

Anand Chandrashekar

Ramesh Chandrasekharan

Jon Henri

Seshasayee Varadarajan

Joshua Collins

Kaihan Abidi Ashtiani

Karl B Levy

James Samuel Sims

Panya Wongsenakhum

Andrew John McKerrow

Lana Hiului Chan

Junghwan Sung

Jonathan David Reid

Ronald Allan Powell

Sang-Hyeob Lee

Chiukin Steven Lai

Francisco J Juarez

Tom Mountsier

Anand Chadrashekar

Disclosed are methods of and apparatuses and systems for depositing a film in a multi-station deposition apparatus. The methods may include: (a) providing a substrate to a first station of the apparatus, (b) adjusting the temperature of the substrate to a first temperature, (c) depositing a first portion of the material on the substrate while the substrate is at the first temperature in the first station, (d) transferring the substrate to the second station, (e) adjusting the temperature of the substrate to a second temperature, and (f) depositing a second portion of the material on the substrate while the substrate is at the second temperature, such that the first portion and the second portion exhibit different values of a property of the material. The apparatuses and systems may include a multi-station deposition apparatus and a controller having control logic for performing one or more of (a)-(f).

Suppressing interfacial reactions by varying the wafer temperature throughout deposition

Described are cleaning methods for removing contaminants from an electrical contact interface of a partially fabricated semiconductor substrate. The methods may include introducing a halogen-containing species into a processing chamber, and forming an adsorption-limited layer, which includes halogen from the halogen-containing species, atop the electrical contact interface and/or the contaminants thereon. The methods may further include thereafter removing un-adsorbed halogen-containing species from the processing chamber and activating a reaction between the halogen of the adsorption-limited layer and the contaminants present on the electrical contact interface. The reaction may then result in the removal of at least a portion of the contaminants from the electrical contact interface. In some embodiments, the halogen adsorbed onto the surface and reacted may be fluorine. Also described herein are apparatuses having controllers for implementing such electrical contact interface cleaning techniques.

Methods and apparatuses for atomic layer cleaning of contacts and vias

Methods and apparatuses for filling high aspect ratio features with tungsten-containing materials are provided. The method involves providing a partially fabricated semiconductor substrate and depositing a tungsten-containing layer on the substrate surface to partially fill one or more high aspect ratio features. The method continues with selective removal of a portion of the deposited layer such that more material is removed near the feature opening than inside the feature. In certain embodiments, removal may be performed at mass-transport limited conditions with less etchant available inside the feature than near its opening. Etchant species are activated before being introduced into the processing chamber and/or while inside the chamber. In specific embodiments, recombination of the activated species is substantially limited and/or controlled during removal, e.g., operation is performed at less than about 250&#xb0; C. and/or less than about 5 Torr.

Depositing tungsten into high aspect ratio features

Methods and apparatuses for filling high aspect ratio features with tungsten-containing materials in a substantially void-free manner are provided. In certain embodiments, the method involves depositing an initial layer of a tungsten-containing material followed by selectively removing a portion of the initial layer to form a remaining layer, which is differentially passivated along the depth of the high-aspect ration feature. In certain embodiments, the remaining layer is more passivated near the feature opening than inside the feature. The method may proceed with depositing an additional layer of the same or other material over the remaining layer. The deposition rate during this later deposition operation is slower near the feature opening than inside the features due to the differential passivation of the remaining layer. This deposition variation, in turn, may aid in preventing premature closing of the feature and facilitate filling of the feature in a substantially void free manner.

Apparatus and methods for filling through silicon vias (TSV's) with copper having an intervening tungsten layer between the copper plug and the silicon are disclosed. Methods are useful for Damascene processing, with or without a TSV feature. The tungsten layer serves as a diffusion barrier, a seed layer for copper electrofill and a means of reducing CTE-induced stresses between copper and silicon. Adhesion of the tungsten layer to the silicon and of the copper layer to the tungsten is described.

Tungsten barrier and seed for copper filled TSV

Certain embodiments pertain to local interconnects formed by subtractive patterning of blanket layer of tungsten or other conductive material. The grain sizes of tungsten or other deposited metal can be grown to relatively large dimensions, which results in increased electrical conductivity due to, e.g., reduced electron scattering at grain boundaries as electrons travel from one grain to the next during conduction.

Subtractive patterning to define circuit components

Methods of filling high aspect ratio features provided on partially manufactured semiconductor substrates with tungsten-containing materials are provided. In certain embodiments, the methods include partial filling a high aspect ratio feature with a layer of tungsten-containing materials and selective removal of the partially filled materials from the feature cavity. Substrates processed using these methods have improved step coverage of the tungsten-containing materials filled into the high aspect ratio features and reduced seam sizes.

Methods and apparatus for preparing a low-resistivity tungsten film on a substrate are provided. Methods involve the formation of a tungsten nucleation layer on a substrate using pulsed nucleation layer (PNL) techniques and depositing a bulk tungsten layer thereon. Methods for forming the tungsten nucleation layer involve the use of a boron-containing species, a tungsten-containing precursor, and optionally, a silane. The methods described are particularly useful for applications where thin, low resistivity films are desired, such as interconnect applications.

Method of forming low-resistivity tungsten interconnects

A tungsten nucleation film is formed on a surface of a semiconductor substrate by alternatively providing to that surface, reducing gases and tungsten-containing gases. Each cycle of the method provides for one or more monolayers of the tungsten film. The film is conformal and has improved step coverage, even for a high aspect ratio contact hole.

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San Jose, CA, United States of America

Aaron R Fellis