Lucent Technologies Inc.

At+t Corp.

Aaron Louis Fisher

Alan Joel Greenberger

Jay Patrick Wilshire

There is disclosed an integrated circuit including a digital processor having EEPROM and a control register. The digital processor is capable of receiving data to be programmed into the EEPROM and is capable of programming the data into the EEPROM. The digital processor includes a control register for receiving bits to control a write line and an erase line. The digital processor also includes a processor core coupled to the control register by a data bus, the digital processor is coupled to the EEPROM by a ROM address bus and a RAM data bus. The EEPROM memory location identified by the ROM address bus is programmed to retain data latched onto the RAM data bus. This is achieved by the digital processor writing control bits to the control register to enable the write line for a write operation of sufficient duration to assure that the data on the RAM data bus is retained in the EEPROM memory address that is enabled.

Digital processor with embedded eeprom memory

There is disclosed an integrated circuit including a sense amplifier. The sense amplifier is capable of encoding 2.sup.n levels of output characteristic into a bit pattern of n corresponding bits. The sense amplifier includes a non-zero detect circuit for detecting when the output characteristic is zero. The sense amplifier also includes 2.sup.n -2 comparators for comparing an output characteristic to 2.sup.n -2 reference levels when the output characteristic is non-zero. The 2.sup.n -2 reference levels are constructed from 2.sup.n -2 non-zero levels of the 2.sup.n possible levels of output characteristic. An encoder is coupled to the non-zero detect circuit and the comparators. The encoder encodes the output from the non-zero detect circuit and the outputs from the comparators to corresponding predetermined bit patterns. When the output characteristic is determined to be zero by the non-zero detect circuit, the bit pattern output is a default bit pattern. When the output characteristic is non-zero, the bit pattern takes on predetermined values determined by which pair of reference levels the output falls between, or whether the output characteristic is greater than the largest reference level or less than the smallest reference level.

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Allentown, PA, United States of America

Aaron Louis Fisher