Micron Technology Incorporated

Asm America, Inc.

Epsilon Limited Partnership

Aage Olsen

Michael W Halpin

Wayne L Johnson

Mark R Hawkins

Dennis L Goodwin

McDonald Robinson

A reflector plate is provided for scattering radiant heat energy in a semiconductor processing reactor chamber to achieve uniform temperature across a substrate to be processed. The surface is characterized by a plurality of adjoining depressions with substantially no planar sections among the depressions. The width to depth ratio for the depressions averages over 3:1. Crests separating the depressions define an angle of greater than about 60&deg;, thus providing a relatively smooth texture for the reflecting surface. The reflecting surface is thus easy to clean. A method of manufacturing the reflector plate comprises removing material from a planar metal surface by ball-end milling. The depth of each depression and degree of overlap with adjacent depressions can randomly vary within selected ranges. A highly specular finish is then provided on the stippled surface by gold electroplating.

Reflective surface for CVD reactor walls

A reflector plate is provided for scattering radiant heat energy in a semiconductor processing reactor chamber to achieve uniform temperature across a substrate to be processed. The surface is characterized by a plurality of adjoining depressions with substantially no planar sections among the depressions. The width to depth ratio for the depressions averages over 3:1. Crests separating the depressions define an angle of greater than about 60.degree., thus providing a relatively smooth texture for the reflecting surface. The reflecting surface is thus easy to clean. A method of manufacturing the reflector plate comprises removing material from a planar metal surface by ball-end milling. The depth of each depression and degree of overlap with adjacent depressions can randomly vary within selected ranges. A highly specular finish is then provided on the stippled surface by gold electroplating.

The present invention relates to a high throughput single crystal epitaxial deposition process which achieves increased uniformity, both wafer to wafer and across the wafer surface. There is provided an epitaxial deposition process characterized by low-level cooling periods which minimize temperature changes between deposition cycles and inter-cycle cleaning so that each new wafer is presented with a substantially equivalent deposition environment.

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Chandler, AZ, United States of America

Aage Olsen