Analog Devices,inc.

Integrated Device Technology, Inc.

Other

A Paul Brokaw

Theresa A Core

Steven J Sherman

Robert W Tsang

Jeffrey G Barrow

Lawrence M DeVito

Chau Cuong Tran

Hio Leong Chao

Jonathan Mark Audy

Evaldo M Miranda, Jr

David Thomson

Marc John Kobayashi

Evaldo M Miranda

Christian S Birk

Javier Alejandro Salcedo

John Albert Geen

Stephen R Lewis

Geoffrey Thomas Haigh

Trey Roessig

Todd L Brooks

William Louis Walter

Michael P Daly

Alex Gusinov

Scott A Wurcer

Douglas W Babcock

Robert A Duris

Yuxin Li

Lewis W Counts

Spencer L Webb

June Her

Robert W K Tsang

Steven Martin

Chan Tran

A bidirectional current sensor circuit can be configured to generate a scaled version of a load current using a first transistor from a power regulator output stage and a second transistor that can be a mirror or scaled version of the first transistor. A trim circuit can be provided to correct gain errors under current sinking or current sourcing conditions. In an example, the bidirectional current sensor circuit can be configured to detect a polarity or a magnitude of a current signal that is used to operate a thermoelectric device.

Bi-directional current sensor

Energy sharing circuits and related methods are disclosed herein. A high voltage can be selectively coupled to a first source line and a low voltage can be selectively coupled to a second source line during a first time period. During a subsequent time period, a first coupling switch is activated to inductively couple the first source line to the second source line and diode block the second source line from the first source line. During a subsequent time period, the low voltage is selectively coupled to the first source line and the high voltage is selectively coupled to the second source line. During a subsequent time period, a second coupling switch is activated to inductively couple the second source line to the first source line and diode block the first source line from the second source line.

Apparatuses and methods for reducing power in driving display panels

A semiconductor switch comprises a PNPN structure arranged to provide an SCR-like functionality, and a MOS gate structure, preferably integrated on a common substrate. The switch includes ohmic contacts for the MOS gate, and for the cathode and gate regions of the PNPN structure; the anode contact is intrinsic. A fixed voltage is typically applied to an external node. The MOS gate structure allows current to be conducted between the external node and the intrinsic anode when on, and the PNPN structure conducts the current from the anode to the cathode when an appropriate voltage is applied to the gate contact. Regenerative feedback keeps the switch on once it begins to conduct. The MOS gate inhibits the flow of current between the external node and anode&#x2014;and thereby turns off the switch&#x2014;when off. When on, the MOS gate's channel resistance serves as a ballast resistor.

Semiconductor switch

A single replica current is proportional to current through a main switch of a switching power converter. This replica current may be used for current compensation, detection and response to an overload, detection and response to a super-overload, and combinations thereof. An input voltage is switchably coupled to an output signal generating a load current responsive to a switch control. A replica switch generates a replica current proportional to the load current. A ramp modulation signal may be generated. A voltage ramp of the ramp modulation signal may be adjusted in response to the replica current. A feedback difference signal is compared to the ramp modulation signal to generate a comparison output. Comparison of an overload reference voltage to a replica voltage proportional to the replica current generates an overload signal. The switch control is generated responsive to the comparison output and may be modified responsive to the overload signal.

Combinations of current feedback for frequency compensation, overload detection, and super overload detection in switching power converters

Soft start circuits for a switching power converter include an amplifier configured to operate from a common bias node and amplify a difference between a positive input and a negative input to generate an amplifier output. A soft start bias circuit supplies a soft start bias current during a soft start process for the switching power converter. An operational bias circuit supplies an operational bias current after the soft start process. In some embodiments, a capacitor is operably coupled to the amplifier output and is configured to provide a frequency compensation for the switching power converter and a charging ramp for the soft start process. In some embodiments, the soft start circuit is configured such that the soft start bias current is at least an order of magnitude smaller than the operational bias current and limits a current that the amplifier can during the soft start process.

Methods and apparatuses for combined frequency compensation and soft start processes

A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistor is connected between their bases across which &#x394;Vappears. A third bipolar transistor is connected such that the voltages at the bases of the first and third transistors are equal or differ by a PTAT amount. A current mirror is arranged to balance the collector current of one of the second and third transistors with an image of the collector current of the first transistor when the output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established such that the operating point has a desired temperature characteristic. A transistor connected to the output node and driven by the output of the current mirror regulates the output voltage by negative feedback.

Two-terminal voltage regulator with current-balancing current mirror

A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistance is connected between their bases across which &#x394;Vappears. A third bipolar transistor is connected such that its base voltage is equal to that of the first transistor or differs by a PTAT amount. A current mirror balances the collector current of one of the second and third transistors with an image of the collector current of the first transistor when an output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established to provide a desired temperature characteristic. A feedback transistor provides current to the bases of the bipolar transistors and to the output node and is driven by the current mirror output to regulate the voltage at the output node by negative feedback.

Voltage reference circuit based on 3-transistor bandgap cell

Error amplifier structures are provided to generate an error signal in response to the difference between an input signal (e.g., a feedback current) and a reference signal (e.g., a bias current). Amplifier embodiments generally include a reference generator and a differencing amplifier. In at least one embodiment, the error generator is arranged to generate first and second bias voltages that correspond to the bias current. In at least one embodiment, the differencing amplifier is configured to provide a reference current to an output node in response to the first bias voltage, provide a feedback current to the output node in response to the second bias voltage, and generate an error current in response to a voltage at the output node. The error amplifier structures are suited for use in various systems such as negative switching regulators.

Error amplifier structures

A switching power converter with a controlled startup mechanism includes a switching stage which provides a voltage Vat an output node in response to a switching control signal, with the output node adapted for connection to a non-linear load. A feedback network compares a signal which varies with the current conducted by the load (I) with a reference signal, and provides the switching control signal so as to maintain Iat a desired value. A capacitor connected to the output node provides a current Ito the feedback network which varies with dV/dt. The feedback network is arranged to limit dV/dt in response to current Iwhen Iis substantially zero. In this way, large inrush currents or damage that might otherwise occur during startup are avoided.

Switching power converter with controlled startup mechanism

A differential stage which uses a bias generator circuit to set the operating currents of the input stage FETs to make the incremental Gm primarily a function of a single resistor embedded in the biasing circuit, such that the input stage has a Gm which only gradually departs from nominal under overdrive, and continues to supply output currents which increase with an increasing differential input signal.

Controlled transconductance differential stage

A linearized controller to operate a switching power converter which includes an inductor having its first terminal coupled to a first voltage (V) and its second terminal switched so that it alternately connects to a second, higher voltage (V) or to a common terminal. A sawtooth voltage generator produces a ramp voltage (V) having a period T and an amplitude which varies in response to a control voltage Vx, and a voltage comparator which compares Vto a control voltage Vy. The comparator output controls the switching such that T is divided into intervals tand t, during which the second terminal is connected to the common terminal or to V, respectively. When Vy is maintained in a fixed proportion to V, Vis driven to be in the same proportion to Vx, independently of changes in V, providing a boost converter. A buck converter is similarly realized.

Linearized controller for switching power converter

A temperature setpoint circuit comprises bipolar transistors Qand Qwhich receive currents Iand Iat their respective collectors and are operated at unequal current densities, with a resistance Rconnected between their bases such that the difference in their base-emitter voltages (&#x394;V) appears across R. An additional PTAT current Iis maintained in a constant ratio to Iand Iand provided to the collector of Qwhile Qis off, and is not provided while Qis on. The circuit is arranged such that Qis turned on and conducts a current equal to Ia when: &#x394;V=(kT/q)ln(NI/Ia), where Ia=I+I, the temperature T at which &#x394;V=(kT/q)ln(NI/Ia) being the circuit's setpoint temperature, such that the switching of current Iprovides hysteresis for the setpoint temperature which is approximately constant over temperature.

Temperature setpoint circuit with hysteresis

A timing circuit operates by applying an arbitrary voltage across a resistance, and using the resulting current to generate a charging current which charges and/or discharges a capacitance to an endpoint voltage. Additional circuitry is arranged such that the capacitance is charged and/or discharged until its voltage crosses a threshold which is proportional to one of the resistance's endpoint voltages, such that the capacitance's endpoint voltage tracks the resistance's endpoint voltage. Thus, the resistor voltage can vary with supply voltage or temperature, or the resistance value itself can vary, without materially affecting the timing relationships. The arbitrary voltage is preferably provided with a pair of diode-connected transistors connected in series with the resistance, so that a single transistor operated at the same current density as one of the diode-connected transistors establishes the threshold voltage and detects when the capacitor voltage reaches the threshold.

Timer circuits and method

A small signal amplifier with a large signal output boost stage are connected between first and second supply rails. The small signal amplifier receives first and second input signals and provides an output signal at an output node which drives a load. Under small signal conditions, the output signal varies approximately linearly with the difference voltage. However, under large signal conditions, a rail-to-rail large signal output boost stage connected to the output node is arranged to drive the output node close to the first or second supply rail as needed to provide the current demanded by the load. The large signal output boost stage is off in small signal conditions, but comes on rapidly and transfers maximum charge to the load under large signal conditions.

Small signal amplifier with large signal output boost stage

An amplifier output voltage swing extender circuit comprises a differential amplifier powered between first and second power supply rails, which receives first and second input signals at non-inverting and inverting inputs, respectively, and provides an output at a first output node. A level shifting circuit, preferably a voltage divider, is connected in series with the first output node and shifts the node voltage toward the second rail by a fixed amount; the shifted voltage is provided at a second output node. A feedback network couples the second output node voltage to the amplifier's inverting input, such that when a voltage VSET is applied to the non-inverting input, the maximum negative voltage excursion at the first and second output nodes is greater than the value of the VSET voltage with respect to the second supply rail.

Growing community of inventors

Burlington, MA, United States of America

A Paul Brokaw