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Welcome to the 11th of April 2023: Our goal is to recognize and celebrate the pioneering inventors who have reached noteworthy milestones in their fields this week (April 11, 2023).
Sr. Director, engineering at Qualcomm
received a Ph.D. degree in electrical engineering from the University of Minnesota, Minneapolis, in 2001. He was with the Samsung Electronics R&D Center at Giheung, Korea, and San Jose, CA, from 1986 to 1995. Dr. Kim worked as an RF Engineering Manager to develop transceiver systems for analog and digital cellular phones.
He was a Research Assistant with the analog design group, at the University of Minnesota from 1997 to 2001.
In 2001, Mr. Kim joined IBM Semiconductor Research and Development Center, East Fishkill, NY.
His research interests include RF and low-power SOI CMOS integrated circuits and systems, semiconductor passive devices, RF SOC, and CMOS integrated transceivers.
Kim is one of the pioneers of SOI CMOS integrated circuit design over 40 GHz to interact between products and silicon technologies.
He has authored and co-authored over 50 publications in journals and conferences in the field of RF and high-speed integrated circuits.
Dr. Kim received first prize in the 2000 SRC Copper Design Challenge
Patent №: 11626236 (Apr. 11, 2023) – Stacked inductor having a discrete metal-stack pattern.
He received his B.S. and M.S. degrees in physics from Osaka University, Japan; in 1995 and 1997, respectively.
Mr. Ikeda joined Semiconductor Energy Laboratory Co., Ltd., Atsugi, Japan, in 1997. Where he has been working on the development of LSIs.
Patent №: 11626052 (Apr. 11, 2023) – A display device with a narrower frame.
Patent №: 11626439 (Apr. 11, 2023) – An imaging device having a three-dimensional integration structure; an electronic device
He received a B.S. degree from the Department of Mechanical and Automotive Engineering, Seoul National University of Science and Technology, South Korea, in 2011; and an M.S. degree in HCI and Robotics from the University of Science and Technology, Daejeon, South Korea, in 2015.
Dong Hyun Lee worked as the Senior Research Engineer at LogonU, South Korea, from 2016 to 2018. Since 2018, he has been working as a Senior Research Engineer with the Articulated Robots Research Group part of the Robotics Lab, Hyundai Motor Company, Uiwang, Gyeonggi, South Korea. His research interests include control architecture design and human-robot interaction for wearable robots.
Patent №: 11625566 (Apr. 11, 2023) – Hologram detection service providing server and hologram detection method.
Memory Architecture Design Office – Consultant, CEO
Koji Sakui received the B.Eng. and M.Eng. degrees, both in instrumental engineering, from Keio University in 1979 and 1981, respectively, and the Ph.D. degree from Tohoku University in 1995.
In 1981, he joined the Toshiba Research and Development Center.
From 1991 through 1993, he was a Visiting Scholar at Stanford University, doing research in the field of the multi-chip module and BiCMOS technologies.
He moved to Sony Corporation in December 2004 and served as a General Manager of the Memory System Department of System LSI Business Division, Semiconductor Business Group.
In April 2007, he moved to NAND Products Group, Intel Corporation, where he was a Research Scientist. He became a Visiting Professor at Tohoku University (2009). In June 2010, he joined Micron as Sr. Architect and Technologist – Memory Innovations. In December 2017, he has become a Principal Scientist at Honda Research Institute Japan. In August 2018, he has become a Principal Scientist at the Tokyo Institute of Technology. He served as a part-time professor at Tsukuba University in 2013. Also, since 2009, he has been a part-time professor at Waseda University.
Dr. Sakui is a member of the IEEE Electron Device Society and served as a Memory Coordinator for ITC (International Test Conference) in 2001, and a Technical Program Committee for the IEEE NVSMW (Non-Volatile Semiconductor Memory Workshop), currently the IEEE IMW (International Memory Workshop) from 1998 to 2012. On January 1st, 2012, he became an IEEE Fellow, with the accompanying citation: “for the contribution to NAND flash memories.”
He received Kanagawa Governor Patent Award in 1997 and Kanto District Patent Award in 2005.
Patent №: 11626162 (Apr. 11, 2023) – Partial block memory operations
received the M.S. degree from Xiamen University (XMU), China, in 2005.
Chunli Liang has been working as a Pre-Research Engineer with ZTE Corporation, since 2006.
Her research interests include synchronization signal, physical uplink channel design, carrier aggregation, full duplex operation, enhancement of ultra-reliable and low latency, coverage enhancements, and multi-carrier operation
Patent №: 11627599 (Apr. 11, 2023) – Method and apparatus for signal transmission, and terminal
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